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Veröffentlichungen

Veröffentlichung

A Configurable Test-Processor for Board-Level Testing

Autoren:
Dr.-Ing. Jorge Hernán Meza Escobar
Dr.-Ing. Steffen Ostendorff
Dr.-Ing. Heinz- Dietrich Wuttke
Typ:
Konferenz
Status:
akzeptiert
Veröffentlichungsdatum
31.08.2016
Abstract:
The ROBSY approach is able to autonomously generate highly flexible FPGA-based test instruments for structural testing of printed circuit boards (PCBs). This paper deals with the development of an essential part of ROBSY, which corresponds to a test-processor. The test-processor is specialized for board-level testing and the support of configuration for the adaptation to the specific test case. In order to evaluate the viability of ROBSY, the ROBSY test system is used to test the interconnections to an SRAM device. The experiments demonstrate that the ROBSY approach and test-processor are suitable for board-level testing.
Bibtex
Zusatzinfo:
http://dx.doi.org/10.1109/DSD.2016.81
Weiterführender Link
http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016
Weiterführendes Dokument
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7723531