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Publication

"Diagnostic Modeling of Microprocessors with High-Level Decision Diagrams", IEEE-Baltic Electronic Conference, BEC2008, Tallinn, Estonia, October 6-8, 2008

Authors:
Raimund Ubar
Dr. Jaan Raik
Artur Jutman
Martin Instenberg
Dr.-Ing. Heinz- Dietrich Wuttke
Typ:
Conferences
Status:
accepted
Date of publication
10/01/2008
Abstract:
The efficiency of test generation (quality, speed) for digital systems like microprocessors is highly depending on the methods for diagnostic modeling of systems. For systems with high logic complexity higher level methods are unavoidable. A method is discussed for modeling microprocessors with high level Decision Diagrams (DD). DDs can be used for developing a general theory for diagnosis of systems on high levels of abstractions, similarly as BDDs are used for logic circuits. The traditional high level fault model of microprocessors is transformed to an equivalent fault model on DDs. On the other hand, the use of high-level DDs (HLDD) allows to formalize and automate high-level test program generation and word justification tasks as we solve the test generation and line justification tasks on logic level using BDDs. Experimental results demonstrate the efficiency of high-level test generation for a benchmark set of simplified RISC type processors compared to the gate-level approach.
Bibtex
External link
http://www.elin.ttu.ee/bec/
Documents
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4657500