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Veröffentlichung

"Teaching Digital Test with BIST Analyzer", 19th EAEEIE Annual IEEE Conference, Tallinn, Estonia, June 29 - July 2, 2008

Autoren:
Artur Jutman
Anton Tsertov
Anton Tsepurov
Igor Aleksejev
Raimund Ubar
Dr.-Ing. Heinz- Dietrich Wuttke
Typ:
Konferenz
Status:
akzeptiert
Veröffentlichungsdatum
01.06.2008
Abstract:
This paper describes a new software tool for high quality training/learning in the field of digital microelectronics. Its main purpose is to give insight into reliability and quality assurance technologies based on Linear Feedback Shift Registers (LFSR) and other Pseudo-Random Pattern Generators (PRPG). Various PRPG types are becoming the mainstream test generation solution used in Built-In Self-Test (BIST) structures. Taking into account complex theoretical concepts behind the microelectronics self-testing (including data coding and compression, cryptography, field theory, linear programming) it is important to effectively educate engineers in this field. The software tool we present in this paper is aimed at facilitating this goal. Unlike other similar systems, this tool facilitates study of various test optimization problems, allows fault coverage analysis for different circuits and with different LFSR parameters. The main didactic aim of the tool is presenting complicated concepts in a comprehensive graphical and analytical way. The multi-platform JAVA runtime environ-ment allows for easy usage of the tool both in the classroom and at home. The BIST Analyzer represents an integrated simulation, training, and research environment that supports both analytic and synthetic way of learning. Due to the above mentioned facts the tool provides a unique training platform to use in courses on electronic testing and design for testability.
Bibtex
Weiterführender Link
http://eaeeie.ttu.ee/
Weiterführendes Dokument
http://ieeexplore.ieee.org/iel5/4606262/4610143/04610171.pdf?tp=&arnumber=4610171&isnumber=4610143