Dr.-Ing. Andreas Becher

• In-Network Processing
• Embedded Systems
• FPGA
• Design Automation
• Design Space Exploration
• C++

• SPP2377 - Disruptive Memory Technologies
• Energy-efficient TinyML: Processing Neural Networks on Tiny Embedded Systems

2026

• Laurin Martins, Alexander Baumstark, Andreas Becher, and Kai-Uwe Sattler
  "Characterizing multi-host cxl 2.0: Latency, bandwidth, and synchronization costs"
  In Proceedings of the 22nd International Workshop on Data Management on New Hardware, 1 June 2026, Bengaluru, India, [DOI]
• Lei Chen, Alexander Baumstark, Andreas Becher, Daniel Ziener, and Kai-Uwe Sattler
  "Let the hardware do it: Fast graph query processing through FPGA-accelerated late materialization and decompression"
  In Proceedings of the 22nd International Workshop on Data Management on New Hardware, 1 June 2026, Bengaluru, India, [DOI]
• Menbari Ahmad, Andreas Becher, and Daniel Ziener
  "BD-RVE: Block dictionary approach for ANN acceleration using RISC-V extension"
  In Architecture of Computing Systems, 24 - 26 April 2026, Mainz, Germany — to appear

2025

• Ali Asghar, Andreas Becher, and Daniel Ziener
  "Backing the wrong horse: How bit-level netlist augmentation can counter power side channel attacks"
  2025, [DOI]
• Ahmad Menbari, Andreas Becher, and Daniel Ziener
  "Hybrid pruning of fully connected layers for resource-constrained embedded systems"
  In 2025 5th International Conference on Intelligent Technology and Embedded Systems (ICITES), 19 - 22 September 2025, Huzhou, China, [DOI]
• Tobias Hahn, Maximilian Langohr, Andreas Becher, Lekshmi Beena Gopalakrishnan Nair, Klaus Meyer-Wegener, Jürgen Teich, and Stefan Wildermann
  "ReProVide: Query optimization and near-data processing on reconfigurable SoCs for big data analysis", ch. 7
  Springer Nature Switzerland, January 2025, [DOI]

2024

• Ali Asghar, Andreas Becher, and Daniel Ziener
  "Short paper: Analysis of vivado implementation strategies regarding side-channel leakage for FPGA-based AES implementations"
  In Proceedings of the International Workshop on Hardware and Architectural Support for Security and Privacy 2024, 2 November 2024, Austin, Texas, [DOI]

2023

• Jens Trautmann, Paul Krüger, Andreas Becher, Stefan Wildermann, and Jürgen Teich
  "Design, calibration, and evaluation of real-time waveform matching on an FPGA-based digitizer at 10 GS/s"
  ACM Transactions on Reconfigurable Technology and Systems (TRETS), December 2023, [DOI]

2022

• Franz-Josef Streit, Paul Krüger, Andreas Becher, Stefan Wildermann, and Jürgen Teich
  "Design and evaluation of a tunable PUF architecture for FPGAs"
  ACM Transactions on Reconfigurable Technology and Systems (TRETS), November 2022, [DOI]
• Jens Trautmann, Nikolaos Patsiatzis, Andreas Becher, Stefan Wildermann, and Jürgen Teich
  "Putting IMT to the test: Revisiting and expanding interval matching techniques and their calibration for SCA"
  In ASHES 2022, 11 November 2022, Los Angeles, USA, [DOI]
• Ali Asghar, Amanda Katherine Robillard, Ilya Tuzov, Andreas Becher, and Daniel Ziener
  "Using look up table content as signatures to identify IP cores in modern FPGAs"
  In Architecture of Computing Systems, 13 - 15 September 2022, Heilbronn, Germany, [DOI]
• Jens Trautmann, Nikolaos Patsiatzis, Andreas Becher, Jürgen Teich, and Stefan Wildermann
  "Real-Time Waveform Matching with a Digitizer at 10 GS/s"
  In IEEE Proceedings of the 32nd International Conference on Field Programmable Logic and Applications, 29 August - 2 September 2022, Belfast, United Kingdom, [DOI]
• Ali Asghar, Andreas Becher, and Daniel Ziener
  "The benefits and costs of netlist randomization based side-channel countermeasures: An in-depth evaluation"
  Journal of Low Power Electronics and Applications, 23 July 2022, [DOI]
• Jorge Echavarria Gutierrez, Stefan Wildermann, Oliver Keszöcze, Faramarz Khosravi, Andreas Becher, and Jürgen Teich
  "Design and error analysis of accuracy-configurable sequential multipliers via segmented carry chains"
  it - Information Technology, 89 — 98, 6 April 2022, [DOI]
• Andreas Becher
  "Near-data query processing on heterogeneous FPGA-based systems"
  Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), 30 March 2022, [URN]
• Tobias Hahn, Andreas Becher, Stefan Wildermann, and Jürgen Teich
  "Raw filtering of JSON data on FPGAs"
  In 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 14 - 23 March 2022, Antwerpen, [DOI]

2021

• Franz-Josef Streit, Paul Krüger, Andreas Becher, Jens Schlumberger, Stefan Wildermann, and Jürgen Teich
  "CHOICE – A tunable PUF-design for FPGAs"
  In 31st International Conference on Field-Programmable Logic and Applications (FPL), 30 August - 3 September 2021, Dresden, Germany, [DOI]
• Lekshmi Beena Gopalakrishnan Nair, Andreas Becher, Stefan Wildermann, Klaus Meyer-Wegener, and Jürgen Teich
  "Speculative dynamic reconfiguration and table prefetching using query look-ahead in the ReProVide near-data-processing system"
  Datenbank-Spektrum, January 2021, [DOI]

2020

• Franz-Josef Streit, F Fritz, Andreas Becher, Stefan Wildermann, S Werner, M Schmidt-Korth, M Pschyklenk, and Jürgen Teich
  "Secure boot from non-volatile memory for programmable SoC-architectures"
  In IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 7 - 11 December 2020, San Jose, CA, USA, [DOI]
• Franz-Josef Streit, S Wituschek, M Pschyklenk, Andreas Becher, M Lechner, Stefan Wildermann, I Pitz, M Merklein, and Jürgen Teich
  "Data acquisition and control at the edge: a hardware/software-reconfigurable approach"
  Production Engineering, 365 — 371, June 2020, [DOI]
• Lekshmi Beena Gopalakrishnan Nair, Andreas Becher, and Klaus Meyer-Wegener
  "The ReProVide query-sequence optimization in a hardware-accelerated DBMS"
  In DaMoN '20: Proceedings of the 16th International Workshop on Data Management on New Hardware, 15 June 2020, Portland, Oregon USA, [DOI]
• Lekshmi Beena Gopalakrishnan Nair, Andreas Becher, Klaus Meyer-Wegener, Stefan Wildermann, and Jürgen Teich
  "SQL query processing using an integrated FPGA-based near-data accelerator in ReProVide"
  In Proceedings of EDBT, 30 March - 2 April 2020, Copenhagen, [DOI]

2019

• Patrick Plagwitz, Franz-Josef Streit, Andreas Becher, Stefan Wildermann, and Jürgen Teich
  "Compiler-based high-level synthesis of application-specific processors on FPGAs"
  In 2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig), 9 - 11 December 2019, Cancun, Mexiko, [DOI]
• Klaus Hochradel, Timm Häcker, Tino Hohler, Andreas Becher, Stefan Wildermann, and Alexander Sutor
  "Three-dimensional localization of bats: visual and acoustical"
  IEEE Sensors Journal, 5825 — 5833, July 2019, [DOI]
• Andreas Becher and Jürgen Teich
  "In situ statistics generation within partially reconfigurable hardware accelerators for query processing"
  In 15th International Workshop on Data Management on New Hardware (DaMoN) held with ACM SIGMOD/PODS 2019, 1 July 2019, Amsterdam, [DOI]
• Andreas Becher, Achim Herrmann, Stefan Wildermann, and Jürgen Teich
  "ReProVide: Towards utilizing heterogeneous partially reconfigurable architectures for near-memory data processing"
  In Datenbanksysteme für Business, Technologie und Web (BTW 2019), 18. Fachtagung des GI-Fachbereichs "Datenbanken und Informationssysteme" (DBIS), Workshopband, 4 - 8 March 2019, Universität Rostock, Germany, [DOI]

2018

• Jorge Alfonso Echavarria Gutiérrez, Katja Schütz, Andreas Becher, Stefan Wildermann, and Jürgen Teich
  "Can approximate computing reduce power consumption on FPGAs?"
  In Proceedings of IEEE International Conference on Electronics Circuits and Systems, 9 - 12 December 2018, Bordeaux, [DOI]
• Franz-Josef Streit, Martin Letras, Stefan Wildermann, Benjamin Hackenberg, Joachim Falk, Andreas Becher, and Jürgen Teich
  "Model-based design automation of hardware/software co-designs for Xilinx Zynq PSoCs"
  In IEEE-Xplore digital library, 3 - 5 December 2018, Cancun, [DOI]
• Andreas Becher, Lekshmi B.G., David Broneske, Tobias Drewes, Bala Gurumurthy, Klaus Meyer-Wegener, Thilo Pionteck, Gunter Saake, Jürgen Teich, and Stefan Wildermann
  "Integration of FPGAs in database management systems: Challenges and opportunities"
  Datenbank-Spektrum, 145 — 156, November 2018, [DOI]
• Klaus Hochradel, Tino Hohler, Andreas Becher, Stefan Wildermann, and Alexander Sutor
  "Development of a multisensor array for localizing bats in space"
  Journal of Physics: Conference Series, 72014, August 2018, [DOI]
• Andreas Becher, Stefan Wildermann, and Jürgen Teich
  "Optimistic Regular Expression Matching on FPGAs for Near-Data Processing"
  In 14th International Workshop on Data Management on New Hardware (DaMoN) Held with ACM SIGMOD/PODS 2018, 11 June 2018, Houston, Texas, [DOI]
• Jorge Alfonso Echavarria Gutiérrez, Katja Schütz, Andreas Becher, Stefan Wildermann, and Jürgen Teich
  "Evaluation of approximate computing techniques for power reduction on FPGAs"
  In AxC18: 3rd Workshop on Approximate Computing, 31 May - 1 June 2018, Swissôtel Bremen

2017

• Jutta Pirkl, Andreas Becher, Jorge Alfonso Echavarria Gutiérrez, Jürgen Teich, and Stefan Wildermann
  "Self-adaptive FPGA-based image processing filters using approximate arithmetics"
  In Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems, 12 - 13 June 2017, Sankt Goar, [DOI]

2016

• Jorge Alfonso Echavarria Gutiérrez, Stefan Wildermann, Andreas Becher, Jürgen Teich, and Daniel Ziener
  "FAU: Fast and error-optimized approximate adder units on LUT-based FPGAs"
  In Proceedings of 2016 International Conference on Field Programmable Technology (FPT), 7 - 9 December 2016, Xi'an, China, [DOI]
• Andreas Becher, Stefan Wildermann, Moritz Mühlenthaler, and Jürgen Teich
  "ReOrder: Runtime Datapath Generation for High-Throughput Multi-Stream Processing"
  In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 29 November - 2 December 2016, Cancún, [DOI]
• Andreas Becher, Jutta Pirkl, Achim Herrmann, Jürgen Teich, and Stefan Wildermann
  "Hybrid energy-aware reconfiguration management on Xilinx Zynq SoCs"
  In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), 29 November - 2 December 2016, Cancún, [DOI]
• Daniel Ziener, Florian Bauer, Andreas Becher, Christopher Dennl, Klaus Meyer-Wegener, Ute Schürfeld, Jürgen Teich, Jörg-Stephan Vogt, and Helmut Weber
  "FPGA-based dynamically reconfigurable SQL query processing"
  ACM Transactions on Reconfigurable Technology and Systems (TRETS), 1 — 24, August 2016, [DOI]
• Andreas Becher, Jorge Alfonso Echavarria Gutiérrez, Daniel Ziener, Stefan Wildermann, and Jürgen Teich
  "A LUT-based approximate adder"
  In 24th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), 1 - 3 May 2016, Washington, DC, USA, [DOI]

2015

• Andreas Becher, Daniel Ziener, Klaus Meyer-Wegener, and Jürgen Teich
  "A co-design approach for accelerated SQL query processing via FPGA-based data filtering"
  In 2015 International Conference on Field Programmable Technology (FPT), 7 - 9 December 2015, Queenstown, New Zealand, [DOI]
• Jorge Alfonso Echavarria Gutiérrez, Andreas Becher, Jürgen Teich, and Daniel Ziener
  "Approximate adder structures on FPGAs"
  In AxC15: 1st Workshop on Approximate Computing, 15 - 16 October 2015, Paderborn, Germany
• Robert Glein, Florian Rittner, Andreas Becher, Daniel Ziener, Jürgen Frickel, Jürgen Teich, and Albert Heuberger
  "Reliability of space-grade vs. COTS SRAM-based FPGA in n-modular redundancy"
  In Proceedings of 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 15 - 18 June 2015, Montreal, QC, Canada, [DOI]

2014

• Andreas Becher, Florian Bauer, Daniel Ziener, and Jürgen Teich
  "Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration"
  In Proceedings of the Conference on Field-Programmable Logic and Applications (FPL), 2 - 4 September 2014, Munich, [DOI]