Bachelor and Master thesis topics

VHDL/Verilog implementation of an IEC18000-63 Type C compliant protocol for UHF RFID tags (860MHz-960MHz) with extremely low power consumption

Time frame:
by arrangement, at least 3 months

Knowledge:
Digital circuit technology and knowledge in design of integrated systems, VHDL/Verilog, design tools of XILINX/Altera

Contact person:
Dr.-Ing. Steffen Arlt
phone: +49 3677 69-1165,
room H3519

 

You can find more information here!

 
 

Optimization of an existing integrated UHF RFID tag analog front-end (860MHz-960MHz) in a 40 nm technology and transfer to an IC layout

Time frame:
by arrangement, at least 3 months

Knowledge:
Analog integrated circuit technology, high frequency technology, optional knowledge of Cadence design tools

Contact person:
Dr.-Ing. Steffen Arlt,
phone: +49 3677 69-1165,
room H3519

Dr.-Ing. Dominik Krauße, 
phone: +49 3677 69-1167,
room H3519

 

You can find more information here!

 
 

Development of an evaluation system for long range UHF RFID applications (860MHz-960MHz) for range optimization

Time frame:
by arrangement, at least 3 months

Knowledge:
Basics in analog and digital circuit technology, basic knowledge of the programming language C

Contact person:
Dr.-Ing. Steffen Arlt,
phone: +49 3677 69-1165,
room H3519

Dr.-Ing. Dominik Krauße,
phone: +49 3677 69-1167,
room H3519

 

You can find more information here!