Journal articles and book contributions

Searching for the relationship between the nanostructure and optical properties has always been exciting the researchers in the field of optics (linear optics as well as non-linear optics), energy harvesting (anti-reflective Si solar cells, perovskite solar cells, ..., etc.), and industry (anti-reflection coating on car windows, sunglasses, etc.). In this work, we present an approach for nanostructuring the silicon substrate to silicon photonic crystals. By precisely controlling the etching time and etching path after using nanoimprint lithography, ordered arrays of inverted Si nanopyramids and Si nanopillars with good homogeneity, uniform surface roughness, high reproducibility of pattern transfer, and a controllable aspect ratio are prepared. Experimental investigation of the optical properties indicates that the reflections of these Si nanostructures are mainly determined by the aspect ratio as well as the period of nanostructures. Furthermore, we have experimentally observed visible-light scattering (V-LS) patterns on inverted Si nanopyramids and Si nanopillars, and their corresponding patterns can be precisely controlled by the patterned nanostructures. The V-LS pattern, background, and "ghost peaks" on the angle-resolved scattering results are caused by constructive interference, destructive interference, and the interference situation between both. This controllable nanopatterning on crystalline Si substrates with precisely tunable optical properties shows great potential for applications in many fields, for example, optics, electronics, and energy.

Secondary ion mass spectroscopy, Fourier transformed infrared spectroscopy, ellipsometry, reflection high energy diffraction and transmission electron microscopy are used to gain inside into the effect of Ge on the formation of ultrathin 3C-SiC layers on Si(111) substrates. Accompanying the experimental investigations with simulations it is found that the ultrathin single crystalline 3C-SiC layer is formed on top of a gradient Si1-x-yGexCy buffer layer due to a complex alloying and alloy decomposition processes promoted by carbon and germanium interdiffusion and SiC nucleation. This approach allows tuning residual stress at very early growth stages as well as the interface properties of the 3C-SiC/Si heterostructure. Useful yields of secondary ions of Ge in Si matrix and Si dimer are estimated.

Well-established metal-catalyzed vapor-liquid-solid (VLS) growth represents still undoubtedly the key technology for bottom-up synthesis of single-crystalline silicon nanowires (SiNWs). Although various SiNW applications are demonstrated, electrical and optical properties are exposed to the inherent risk of electronic deep trap state formation by metal impurities. Therefore, metal catalyst-free growth strategies are intriguing. The oxid-assisted SiNW synthesis is explored and it is shown that contamination control is absolutely crucial. Slightest metal impurities, such as iron, are sufficient to trigger SiNW growth, calling into question true metal catalyst-free SiNW synthesis. Therefore, the term contamination-assisted is rather introduced and it is shown that contamination-assisted SiNW growth is determined by the chemical surface treatment (e.g., with KOH solution), but also by the crystal orientation of a silicon substrate. SiNWs are grown in this regards in a reproducible manner, but so far with a distinct tapering, using a conventional gas-phase reactor system at temperatures of about 680 ˚C and monosilane (SiH4) as the precursor gas. The synthesized SiNWs show convincing electrical properties compared to Au-catalyzed SiNWs. Nevertheless, contamination-assisted growth of SiNWs appears to be an important step toward bottom-up synthesis of high-quality SiNWs with a lower risk of metal poisoning, such as those needed for CMOS and other technologies.

Low-defect III-V multilayer structures grown on Si(100) open opportunities for a wide range of cost-effective high-performance photovoltaic and optoelectronic devices. For that, (Al)GaP epilayers prepared almost lattice-matched on Si(100) substrates can serve as high-quality virtual substrates for subsequent heteroepitaxial growth. The evolution of crystal defects, such as stacking fault pyramids or threading dislocations, needs to be impeded already during the first preparation step, the III-V-on-Si nucleation, as they tend to propagate into the subsequently grown layers and increase nonradiative electron-hole recombination rates, which finally degrade the device performance. We establish a ternary GaP/AlP pulsed nucleation process on Si(100) substrates fabricated by metalorganic chemical vapor deposition, and compare it to the defect evolution from pure GaP nucleation layers (NLs). The entire procedure was optically monitored in situ using reflection anisotropy spectroscopy. Crystal defects were investigated by electron channeling contrast imaging. GaP grown on GaP/AlP NLs exhibits drastically reduced densities of threading dislocations and stacking faults by 1 and 2 orders of magnitude, respectively, compared to buffer layers grown on binary GaP NLs. We observed that the surface morphology at the initial stage of growth of these buffer layers is significantly smoother compared to the buffer layers grown on pure GaP NLs using atomic force microscopy. The proposed nucleation procedure here is supposed to substantially improve the crystalline quality of III-V buffer layers integrated on Si(100) wafers.